Design a Verified UART Receiver and Loopback for an FPGA Sensor Hub
Overview
What this challenge is about.
Build a UART receiver with 16x oversampling and loopback on an FPGA, then verify with test vectors. Earn a verifiable certificate.
The scenario
Helax Edge Systems is a 28-person industrial Internet-of-Things startup in Munich that builds edge-sensor hubs for factory-automation integrators, and its next hub revision standardizes on a Xilinx 7-series FPGA to ingest serial sensor data at several customer-specified baud rates.
The Brief
What you'll do, and what you'll demonstrate.
Design a verified, configurable UART receiver in Verilog for Helax's edge-sensor hub that recovers bytes correctly across three baud rates and proves itself on a real Arty A7 board.
Earning criteria — what you'll demonstrate
- Design a 16-times-oversampled UART receiver with configurable baud and 8N1 framing in Verilog
- Safely cross an asynchronous serial input into the FPGA clock domain to avoid metastability
- Write a self-checking testbench that exercises multiple baud rates and injected framing errors
- Synthesize for a Xilinx 7-series FPGA and validate a design end-to-end against real hardware
- Communicate hardware design decisions clearly in a concise written proposal
Program Fit
Where this fits in your program.
Sharpens the same skills your degree expects you to demonstrate.
Aligned coursework coming soon.
Skills
Skills you'll demonstrate.
Each one shows up on your verified credential.
- Verilog
Apply verilog to solve real industry problems and demonstrate production-level capability.
- Uart
Apply uart to solve real industry problems and demonstrate production-level capability.
- Fpga
Apply fpga to solve real industry problems and demonstrate production-level capability.
- Testbench Design
Apply testbench design to solve real industry problems and demonstrate production-level capability.
- Metastability
Apply metastability to solve real industry problems and demonstrate production-level capability.
- Hardware Validation
Apply hardware validation to solve real industry problems and demonstrate production-level capability.
Careers
Career paths this challenge builds toward
Completing this challenge demonstrates skills that transfer directly to these roles:
FPGA Design Engineer
Builds and synthesizes digital logic for FPGA targets. This challenge mirrors the daily loop of writing register-transfer-level code, meeting board constraints, and proving a block on real silicon before it ships in a product.
This challenge sharpens
- verilog
- fpga
- hardware-validation
Digital Verification Engineer
Proves that digital blocks behave correctly before tape-out or deployment. Here you build a self-checking testbench that exercises a serial protocol across baud rates and injected error cases, the core craft of functional verification.
This challenge sharpens
- testbench-design
- verilog
- uart
Embedded Hardware Engineer
Bridges firmware and physical hardware in edge and IoT products. This challenge develops the instincts for clock-domain crossing and bringing a design from simulation onto a real board talking to external peripherals.
This challenge sharpens
- fpga
- metastability
- hardware-validation