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Design a Polyhedral Loop-Tiling Strategy for a Tensor DSL

FreeVerified credential4 weeksExpert

Overview

What this challenge is about.

Design a polyhedral loop-tiling MLIR pass, benchmark cache-miss reductions, and deliver a design document. Earn a verifiable certificate.

The scenario

The vendor (Series B, CHF 40M raised) wins or loses sales demos on numerical performance — 30 percent end-to-end speedup on a customer model is a renewal lever.

CredentialBlockchain-anchored
ShareableLinkedIn-ready
LanguageEnglish
PaceSelf-paced

The Brief

What you'll do, and what you'll demonstrate.

Design and prototype a polyhedral loop-tiling strategy for a tensor DSL, measured on 8 programs with cache-miss and end-to-end speedup metrics.

Earning criteria — what you'll demonstrate

  • Apply polyhedral or affine loop-tiling techniques to a real IR
  • Reason about cache locality via measured miss rates, not heuristics alone
  • Work inside the MLIR ecosystem on a non-trivial pass
  • Design and document a tile-size selection heuristic

Program Fit

Where this fits in your program.

Sharpens the same skills your degree expects you to demonstrate.

Advanced Compilers and Program Optimization

Master · Programming Languages

Strong alignment

This challenge maps to Advanced Compilers and Program Optimization at the Master level. It sharpens the same practical skills your coursework expects — but in a real industry context with actual constraints and deliverables.

One more thing

You can put a credential on your CV by Friday.