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Design

Design a Sequential Vending-Machine Controller in VHDL

FreeVerified credential3 weeksIntermediate

Overview

What this challenge is about.

Design a VHDL vending-machine controller with coin handling, change, and cancel. Write a testbench and synthesize for FPGA to earn your verifiable certificate.

The scenario

The vending-machine manufacturer (privately held, Spanish-speaking, hires hardware engineers from 3 local universities) wants the controller to be a teaching artifact, not just a working design.

CredentialBlockchain-anchored
ShareableLinkedIn-ready
LanguageEnglish
PaceSelf-paced

The Brief

What you'll do, and what you'll demonstrate.

Design a Mealy/Moore VHDL FSM for a 4-product vending machine with coin handling, change return, and a 7-segment display, synthesized on Cyclone V.

Earning criteria — what you'll demonstrate

  • Choose between Mealy and Moore FSMs with justified reasoning
  • Implement and verify a sequential controller in VHDL
  • Cover all paths in a testbench including cancel and over-payment
  • Synthesize for a non-Xilinx vendor toolchain

Program Fit

Where this fits in your program.

Sharpens the same skills your degree expects you to demonstrate.

Aligned coursework coming soon.

One more thing

You can put a credential on your CV by Friday.