Design a Sequential Vending-Machine Controller in VHDL
Overview
What this challenge is about.
Design an FSM that accepts 10c, 20c, 50c, EUR 1 coins, supports 4 products priced EUR 1.20-1.80, dispenses the selected product when paid, returns change, handles cancel. Choose Mealy or Moore and justify the choice. Write a testbench that exercises every path including over-payment and cancel. Synthesize for Intel Cyclone V (DE10-Lite). Add a small 7-segment display showing balance. Deliver source, testbench, state diagram, simulation waveforms, the bitstream, and a 6-page design document including the FSM rationale.
The Brief
What you'll do, and what you'll demonstrate.
Design a Mealy/Moore VHDL FSM for a 4-product vending machine with coin handling, change return, and a 7-segment display, synthesized on Cyclone V.
Earning criteria — what you'll demonstrate
- Choose between Mealy and Moore FSMs with justified reasoning
- Implement and verify a sequential controller in VHDL
- Cover all paths in a testbench including cancel and over-payment
- Synthesize for a non-Xilinx vendor toolchain
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