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Port a Microkernel's Fast Message Path from x86-64 to RISC-V

FreeVerified credential2 weeksExpert

Overview

What this challenge is about.

Port a microkernel's fast message path from x86-64 to RISC-V, preserving register-only messages and capability checks. Pass tests and earn a verifiable certificate.

The scenario

The project is a capability-based microkernel maintained by a small research community and deployed in middleware for avionics systems, where a single incorrect message transfer or timing regression can violate a safety certification. RISC-V is an open, royalty-free processor architecture increasingly attractive for long-lived, auditable safety-critical hardware.

CredentialBlockchain-anchored
ShareableLinkedIn-ready
LanguageEnglish
PaceSelf-paced

The Brief

What you'll do, and what you'll demonstrate.

Re-implement a microkernel's hand-optimized synchronous fast message path for the RISC-V 64-bit architecture while preserving its exact behavior and measuring its latency against the x86-64 original.

Earning criteria — what you'll demonstrate

  • Translate a hand-optimized assembly fast path between two processor architectures while preserving exact behavior
  • Map an architecture-specific calling convention and register-allocation scheme onto the RISC-V 64-bit register file
  • Preserve subtle systems invariants — register-only message passing, direct context switch, and capability checks — across a port
  • Measure low-latency operations rigorously with pinned cores, repeated runs, and confidence intervals
  • Write an architectural reference document that lets maintainers reason about and extend the port

Program Fit

Where this fits in your program.

Sharpens the same skills your degree expects you to demonstrate.

Aligned coursework coming soon.

Careers

Career paths this challenge builds toward

Completing this challenge demonstrates skills that transfer directly to these roles:

Systems Architect

Porting a performance-critical kernel path teaches you to reason about processor architecture, calling conventions, and system invariants at once — the core judgment a systems architect applies when designing portable, certifiable low-level software.

This challenge sharpens

  • microkernels
  • kernel-development
  • risc-v

Embedded Kernel Engineer

Re-implementing a fast message path in assembly for a new architecture mirrors the daily work of embedded kernel engineers who bring up operating systems on novel safety-critical hardware and must preserve exact behavior across processors.

This challenge sharpens

  • assembly-programming
  • ipc
  • kernel-development

Performance Engineer

Measuring round-trip latency with pinned cores, repeated runs, and confidence intervals, then comparing across architectures, builds the rigorous measurement discipline performance engineers use to defend and improve low-latency systems.

This challenge sharpens

  • benchmarking
  • ipc
  • risc-v

One more thing

You can put a credential on your CV by Friday.