Engineering & Technology
Computer Engineering Challenges
Real computer-engineering projects on Ewance — work across hardware and software on systems shaped like industry problems. Solve them to build a portfolio of verified, recruiter-checkable proof you can do the work — not just describe it.
Recommended challenges
- CodeIntermediateNew
FPGA-Based Convolution Accelerator for an Embedded Vision Camera
Design the accelerator as an AXI-Stream block: input video stream, line-buffer-based 3x3 windowing, fixed-point multiply-accumulate tree, output stream. Parameterize for arbitra…
- Systemverilog
- Fpga
- Axi Stream
Digital Systems Design - DesignBeginnerNew
Build a PlatformIO CI Pipeline for a Multi-Board Firmware Team
Use GitHub Actions + PlatformIO. Build matrix across the 6 boards. Run native unit tests + QEMU-based emulation tests for boards that QEMU supports. Set up a self-hosted runner …
- Platformio
- Github Actions
- Embedded Ci
Embedded Systems Engineering - AnalysisSeniorNew
Cyber-Physical Security Audit for a Connected-Building HVAC System
Audit one representative tower's BMS: enumerate BACnet devices (network discovery + capability inventory), identify lateral-movement paths (tenant wifi -> guest network -> BACne…
- Cyber Physical Systems
- Ot Security
- Risk Management
Internet of Things and Cyber-Physical Systems - DesignIntermediateNew
Wireless Sensor-Network Design for a Vineyard Microclimate Study
Spec the network: 60 LoRaWAN sensor nodes + 2 gateways (TheThingsStack indoor + outdoor gateway choice), star topology with possible relays. Node hardware: ESP32 + LoRa + sensor…
- Sensor Networks
- Embedded Systems
- Lorawan
Internet of Things and Cyber-Physical Systems Practice your coursework on real scenarios.
Every challenge is shaped from real industry context — not generic exercises. The work mirrors what your degree prepares you for.
Why Ewance
- CodeFoundationalNew
Design a 7-Segment Display Controller for a Coffee-Roaster Console
Design the controller in Verilog: 4-bit BCD (binary-coded decimal) to 7-segment decoder, time-multiplexed digit refresh at 1 kHz per digit, brightness PWM input from MCU, decima…
- Verilog
- Fpga
- Digital Logic
Digital Systems Design - CodeSeniorNew
Implement a Pipelined RISC-V (RV32I) Core for Automotive Telemetry
Implement a classic 5-stage RV32I pipeline in SystemVerilog. Include data-forwarding from EX/MEM and MEM/WB back to EX, a load-use stall, and branch resolution in EX with a 1-cy…
- Systemverilog
- Risc V
- Pipelining
Digital Systems Design - CodeIntermediateNew
Edge-Inference Pipeline for a Smart-Factory Vibration Monitor
Architect a pipeline that runs on an ESP32-S3 + STM32 combo (provided): (1) sample 3-axis accelerometer at 3.2 kHz, (2) compute windowed FFT features on-device every 1s, (3) run…
- Edge Computing
- Embedded Systems
- Sensors And Actuators
Internet of Things and Cyber-Physical Systems - CodeSeniorNew
Implement a Bootloader with Secure OTA for a Medical Wearable
Implement using MCUboot as the secondary-image bootloader. Set up an offline signing pipeline (Ed25519 keys, HSM-backed for production). Implement the OTA client: BLE file trans…
- Mcuboot
- Secure Bootloader
- Firmware Signing
Embedded Systems Engineering - Browse challenges
Explore role
Product Manager
Ship product that solves real user problems. Combine user research, prototyping, and stakeholder alignment to turn ambiguous briefs into measurable wins — the role at the centre of modern software teams.
- CodeIntermediateNew
Build a Zephyr-Based Sensor Node for Industrial IoT
Set up a Zephyr workspace, configure the device tree for the provided nRF52840 + ADXL355 + custom BLE service. Implement: SPI driver for accelerometer at 4 kHz, on-device 1024-p…
- Zephyr Rtos
- Ble Protocol
- Low Power Design
Embedded Systems Engineering - DesignSeniorNew
OTA Firmware-Update Architecture for a 50,000-Device Smart-Meter Fleet
Design a 4-stage OTA architecture: (1) signed image build + manifest, (2) backend rollout (1 percent canary, 10 percent expand, 50 percent expand, 100 percent), (3) device-side …
- Embedded Systems
- Cyber Physical Systems
- Edge Computing
Internet of Things and Cyber-Physical Systems - AnalysisSeniorNew
Diagnose a Hard-Real-Time Failure in an Automotive ECU
Receive anonymized AUTOSAR runnable + task traces (CSV + Vector CANalyzer .blf), 8 hours covering 3 failure events. Identify timing budget per task and runnable. Reproduce on th…
- Autosar
- Real Time Debugging
- Can Bus Analysis
Embedded Systems Engineering - DesignIntermediateNew
Real-Time Traffic-Sensor Fusion for a Smart Intersection
Design a fusion architecture: per-modality timestamping (NTP-disciplined within 50ms), per-modality confidence weighting (modality-specific noise model), Kalman-filter or partic…
- Sensor Fusion
- Cyber Physical Systems
- Edge Computing
Internet of Things and Cyber-Physical Systems Build a verifiable portfolio.
Submissions become evidence. Reviewers with shipping experience score against a rubric; the result becomes a credential anyone can verify.
Why Ewance
- CodeIntermediateNew
Port a Drone Flight Controller from Bare-Metal to FreeRTOS
Take the existing bare-metal firmware (STM32H7, around 14,000 lines C). Identify the tasks (control loop 1 kHz, IMU read 2 kHz, GPS 10 Hz, telemetry 50 Hz, command parsing event…
- Freertos
- Rate Monotonic Scheduling
- C Programming
Embedded Systems Engineering - CodeBeginnerNew
Build a UART Receiver and Loopback on FPGA for an Industrial Sensor Hub
Design a UART receiver in Verilog with 16x oversampling, configurable baud divisor, start-bit detection, 8N1 framing, framing-error flag. Pair with a minimal transmitter for the…
- Verilog
- Uart
- Fpga
Digital Systems Design - DesignBeginnerNew
Design a Sequential Vending-Machine Controller in VHDL
Design an FSM that accepts 10c, 20c, 50c, EUR 1 coins, supports 4 products priced EUR 1.20-1.80, dispenses the selected product when paid, returns change, handles cancel. Choose…
- Vhdl
- Fsm Design
- Sequential Circuits
Digital Systems Design
How it works
From brief to credential, in six steps.
Step 01
Browse challenges aligned to your studies.
Step 02
Accept the one that fits your goals.
Step 03
Work through it with AI Copilot guidance.
Step 04
Submit for structured evaluation.
Step 05
Earn a verified credential.
Step 06
Add it to LinkedIn with one click.
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